Ask
Login
TAGGED IN

Computer Organization And Architecture

Follow this tag to get notifications whenever a new post is added

ALL TAGS
0
votes
0
answers
1.0k
views
0
answers
Computer Organization and Architecture
computer organization and architecture updated 2.1 years ago by pedsangini276 • 4.7k
1
vote
0
answers
626
views
0
answers
What are the pipeline hazards and how they can be solved?
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
531
views
0
answers
Multiply (9) and (D) using Add and shift method.
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
567
views
0
answers
Explain different policies of memory 1.WRITE 2.ALLOCATION
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
747
views
0
answers
Explain in detail elements of Cache design.
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
687
views
0
answers
Write functions of the following registers: 1. MAR 2. MDR 3.SP 4.Y 5.Z
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
2.7k
views
0
answers
Interface 4KB of EPROM with starting address from 0000h and 2 KB of RAM with starting address followed by EPROM.
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
675
views
0
answers
Explain Flynns Classification for parallelism.
computer organization and architecture updated 2.1 years ago by RakeshBhuse • 3.2k
0
votes
0
answers
1.2k
views
0
answers
Shanon's Sampling Theorem
computer organization and architecture updated 2.1 years ago by teamques10 ★ 64k
0
votes
0
answers
1.3k
views
0
answers
What is memory interleaving explain it with necessary figures
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
583
views
0
answers
Find out page fault for following string using FIFO LFU LRU method.2,1,3,1,5,4,2,1,5 (Consider page frame size=3)
computer organization and architecture updated 2.1 years ago by binitamayekar ★ 6.4k
0
votes
0
answers
598
views
0
answers
Show how pages are replaced between cache memory and main memory using replacement policies.
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
2.1k
views
0
answers
A 32 bit processor has a 32 bit memory address. It has 8 kb of cache memory. The computer follows 4 way set associate mapping with each cache line size being 16 bytes. Show the memory address form
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
652
views
0
answers
Show the address decoding for 128 KB ROM C32 bit memory using 32 bit address
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
736
views
0
answers
Calculate the effective memory access time for M1:50 ns access time, M2:400 ns access time and hit ratio of M1:0.95
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
990
views
0
answers
Consider 4 way set associative cache mapping with cache block size = 16 bytes, cache size = 8 K, main memory size = 64K. Design cache structure and show how the processor address is interpreted
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
693
views
0
answers
Explain how virtual address is converted o physical address using paging. Also explain translation look aside buffer.
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
602
views
0
answers
Draw a block schematic of micro programmed control unit and explain in brief
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
493
views
0
answers
Write microinstruction for the instruction Add R0,[R3].
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
2.9k
views
0
answers
Multiply the following number using bit-pair recoding method. Multiplicand 01111(15), Multiplier 10110(-10)
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
477
views
0
answers
Explain the various expectations and how exception handling is performed in IA-32 architecture
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
853
views
0
answers
Explain Booths Algorithm for signed representation with the help of flow chart and hence multiply $-9 \ast7. $
computer organization and architecture updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
0
answers
291
views
0
answers
Instruction processing or instruction cycle comprises of Instruction fetch and Instruction execute. The processor interprets the fetched instruction and performs the required action. In general, what
computer organization and architecture updated 2.1 years ago by anupagurung614 • 20
0
votes
0
answers
281
views
0
answers
Instruction processing or instruction cycle comprises of Instruction fetch and Instruction execute. The processor interprets the fetched instruction and performs the required action. In general, what
computer organization and architecture updated 2.1 years ago by anupagurung614 • 20
0
votes
0
answers
809
views
0
answers
Draw and explain register structure IA-32 family
computer organization and architecture updated 2.2 years ago by sagarkolekar ★ 11k
<prev • 63 results • page 1 of 3 • next >